The keyword open can be used when entities have unconnected ports in the port map.

Spør donn om hvorfor det forekommer magiske latches.

A statemachine should have an upper and lower part. The upper part should be purely combinatorial.

Traps in vhdl:
- Incomplete cases with potential latch generation
- Fake syncronous tasks
- Noncorectly spesified state machines

http://www.csee.umbc.edu/portal/help/VHDL/operator.html

http://www.tcnj.edu/~hernande/r/VHDL_QRC__01.pdf

http://sub.allaboutcircuits.com/images/quiz/01249x02.png